The invention relates to digital amplifiers and more particularly to a pulse width modulated (PWM) audio amplifier employing a pulse insertion circuit for maintaining circuit operation in overdriven conditions and for preventing damage to amplifier components when the output is grounded.
Conventional linear amplifiers modulate load power by varying the conduction through output devices such as transistors or vacuum tubes. This continuous variation implies operation of the output devices in a region of linear response. Dissipated power is equal to the product of voltage across and current through the device. As a result, such output devices in linear amplifiers must dissipate considerable power. The dissipated power represents a loss in the efficiency of the amplifier. In addition, the energy lost must be removed from the device in order to avoid overheating. As a result, linear amplifiers have intrinsic efficiency limitations, and require complicated and expensive heat dissipation schemes.
In contrast, digital amplifiers, for example class D devices, operate by using an incoming analog signal to modulate a digitally switched signal. The digital signal is amplified and demodulated to produce an amplified version of the analog input. Modulation switching transistors in saturation are cut off, with only brief transitions between each cycle through the linear region of operation. Consequently, thermal losses due to dissipated power through the output device tend to be much smaller than corresponding losses in an analog amplifier.
Digital amplifiers, however, generally have higher component counts and are more complex than corresponding linear amplifiers. These factors result in higher direct costs for components, higher development costs, increased process risks during manufacture and increased failure risks thereafter. It is therefore desirable to reduce the component count of an effective digital amplifier while maintaining performance advantages offered by digital switching.
FIG. 1 shows a general block diagram of a conventional pulse-width modulation system 100. FIGS. 2A and 2B show exemplary waveforms of the system 100 under normal and overmodulated conditions, respectively.
An oscillator 101 produces a square wave clock signal or reference pulse R output at a frequency FR, and a sawtooth output S, at a frequency 2FR. An input signal IN is amplified through a gain stage 102 and a feedback stage 103. The output of the feedback stage 103 is coupled to one input of a comparator 104 as CIN signal. The sawtooth signal S is coupled to other input of the comparator 104.
The comparator 104 generates a pulse-width modulated (PWM) gate drive signal G. The gate drive G toggles between high and low states, as shown in FIG. 2. The PWM gate drive signal G is coupled via drivers 106 and 107 to MOSFET power switches 108 and 109 for amplification. The amplified PWM signal is coupled to a load 111, e.g., speaker via an output filter 110, where the carrier signal is removed. Negative feedback in the form of a sample FS from the output filter 110 is coupled to an input to the feedback stage 103 as shown to reduce signal distortion.
The above-described modulator works satisfactorily under input signal conditions illustrated in FIG. 2A. However, if the input to the comparator signal is overdriven, i.e., IN exceeds the peak amplitude of the sawtooth S, as shown in FIG. 2B, the gate drive signal G fails to toggle and is maintained in one state or the other. The condition known as overmodulation causes the gate drive signal G to reduce to a DC level in the regions OM, instead of a pulse with modulated signal. This condition leaves one or the other of the MOSFETS 108 and 109 in an ON state until such time as the input IN returns below the peak amplitude of the sawtooth signal S. The impedance of the output load 111, which is generally 4 or 8 ohms, limits the current through the ON MOSFET during the over-modulated period and prevents component failure.
An optional gain control circuit 105, coupled between the output of the comparator 104 and a gain control input 102A of the gain stage 102, may be employed to reduce the gain of the gain stage 102 and thereby reduce or limit overmodulation. However, the gain control 105 is only operable over a finite dynamic range. Accordingly, if the input signal IN is increased beyond this amount, the gain control 105 ceases to function and the overmodulation condition can once again occur.
Although the amplifier 100 can function when this condition occurs, if the output load is shorted to ground, the overmodulated condition results in the ON MOFSET being current limited only by its internal ON-resistance, plus the impendance of the output filter 110, which is generally less than about 250 millihoms. Under these conditions the continuous current through the ON MOSFET will likely exceed its continuous current rating and cause component failure.
U.S. Pat. No. 4,724,396 describes a gain control circuit that reduces the gain of the gain stage when overmodulation occurs. The patent suffers from the above-described limitations.
U.S. Pat. No. 5,917,369 describes a pulse width modulated amplifier that employs output limiting logic and an automatic gain control circuit. The patent describes a circuit for inserting pulses into an overmodulated region of a PWM signal to prevent filter saturation when the amplitude of the input signal exceeds that of a modulating triangle wave reference. The square wave, synchronized to the modulating triangular wave triggers a monostable vibrator whereby pulses of fixed duration are generated. The arrangement requires a complex drive circuit and a high component count insertion circuit.
The invention is based upon the discovery that toggling pulses may be inserted in the output of a PWM amplifier during overmodulated periods so that the duty cycle of output switch can be limited. The arrangement lowers the current through the output device, e.g., MOSFET, and component failure is thereby avoided. The present invention inserts pulses using a simplified circuit whereby series connected circuits produce opposite polarity pulses for a insertion gate circuit.
An input muting circuit limits the current through the MOSFETs to reduce thermal losses during short circuit conditions thereby avoiding over-temperature conditions.